Suppression of the floating-body effect in poly-Si thin-film transistors with self-aligned Schottky barrier source and ohmic body contact structureKUO, Po-Yi; CHAO, Tien-Sheng SR; LEI, Tan-Fu et al.IEEE electron device letters. 2004, Vol 25, Num 9, pp 634-636, issn 0741-3106, 3 p.Article

High voltage applications and NBTI effects of DT-pMOSFETS with reverse Schottky substrate contactsLEE, Yao-Jen; CHAO, Tien-Sheng; HUANG, Tiao-Yuan et al.Microelectronics and reliability. 2005, Vol 45, Num 7-8, pp 1119-1123, issn 0026-2714, 5 p.Article

Temperature Dependence of Electron Mobility on Strained nMOSFETs Fabricated by Strain-Gate EngineeringCHANG, Tien-Shun; TSUNG YI LU; CHAO, Tien-Sheng et al.IEEE electron device letters. 2012, Vol 33, Num 7, pp 931-933, issn 0741-3106, 3 p.Article

Impacts of Multiple Strain-Gate Engineering on a Zero-Temperature-Coefficient PointCHANG, Tien-Shun; YI LU, Tsung; CHAO, Tien-Sheng et al.IEEE electron device letters. 2013, Vol 34, Num 4, pp 481-483, issn 0741-3106, 3 p.Article

The Zero-Temperature-Coefficient Point Modeling of DTMOS in CMOS IntegrationWANG, Kuan-Ti; LIN, Wan-Chyi; CHAO, Tien-Sheng et al.IEEE electron device letters. 2010, Vol 31, Num 10, pp 1071-1073, issn 0741-3106, 3 p.Article

Hydrogen Instability Induced by Postannealing on Poly-Si TFTsLIAO, Chia-Chun; LIN, Min-Chen; CHAO, Tien-Sheng et al.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 6, pp 1807-1809, issn 0018-9383, 3 p.Article

Characterization of Enhanced Stress Memorization Technique on nMOSFETs by Multiple Strain-Gate EngineeringLU, Tsung-Yi; CHANG, Tien-Shun; HUANG, Shih-An et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 4, pp 1023-1028, issn 0018-9383, 6 p.Article

Effects of Channel Width and Nitride Passivation Layer on Electrical Characteristics of Polysilicon Thin-Film TransistorsLIAO, Chia-Chun; LIN, Min-Chen; CHIANG, Tsung-Yu et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 11, pp 3812-3819, issn 0018-9383, 8 p.Article

A Novel Ion-Bombarded and Plasma-Passivated Charge Storage Layer for SONOS-Type Nonvolatile MemoryLIU, Sheng-Hsien; YANG, Wen-Luh; WU, Chi-Chang et al.IEEE electron device letters. 2012, Vol 33, Num 10, pp 1393-1395, issn 0741-3106, 3 p.Article

Impacts of the Underlying Insulating Layers on the MILC Growth Length and Electrical CharacteristicsLIAO, Chia-Chun; LIN, Min-Chen; LIU, Shao-Xuan et al.IEEE electron device letters. 2012, Vol 33, Num 2, pp 239-241, issn 0741-3106, 3 p.Article

High-performance p-channel LTPS-TFT using HfO₂ gate dielectric and nitrogen ion implantationMA, Ming-Wen; CHIANG, Tsung-Yu; CHAO, Tien-Sheng et al.Semiconductor science and technology. 2009, Vol 24, Num 7, issn 0268-1242, 072001.1-072001.4Article

High-performance poly-Si TFTs with fully Ni-self-aligned silicided S/D and gate structureKUO, Po-Yi; CHAO, Tien-Sheng; WANG, Ren-Jie et al.IEEE electron device letters. 2006, Vol 27, Num 4, pp 258-261, issn 0741-3106, 4 p.Article

A domain partition approach to parallel adaptive simulation of dynamic threshold voltage MOSFETYIMING LI; CHAO, Tien-Sheng; SZE, S. M et al.Computer physics communications. 2002, Vol 147, Num 1-2, pp 697-701, issn 0010-4655, 5 p.Conference Paper

Benefit of NMOS by Compressive SiN as Stress Memorization Technique and Its MechanismLIAO, Chia-Chun; CHIANG, Tsung-Yu; LIN, Min-Chen et al.IEEE electron device letters. 2010, Vol 31, Num 4, pp 281-283, issn 0741-3106, 3 p.Article

High-Program/Erase-Speed SONOS With In Situ Silicon NanocrystalsCHIANG, Tsung-Yu; CHAO, Tien-Sheng; WU, Yi-Hong et al.IEEE electron device letters. 2008, Vol 29, Num 10, pp 1148-1151, issn 0741-3106, 4 p.Article

Poly-Si Thin-Film Transistor Nonvolatile Memory Using Ge Nanocrystals as a Charge Trapping Layer Deposited by the Low-Pressure Chemical Vapor DepositionKUO, Po-Yi; CHAO, Tien-Sheng; HUANG, Jyun-Siang et al.IEEE electron device letters. 2009, Vol 30, Num 3, pp 234-236, issn 0741-3106, 3 p.Article

Vertical n-Channel Poly-Si Thin-Film Transistors With Symmetric S/D Fabricated by Ni-Silicide-Induced Lateral-Crystallization TechnologyKUO, Po-Yi; CHAO, Tien-Sheng; LAI, Jiou-Teng et al.IEEE electron device letters. 2009, Vol 30, Num 3, pp 237-239, issn 0741-3106, 3 p.Article

Characteristics of self-aligned Si/Ge T-gate poly-Si thin-film transistors with high ON/OFF current ratioKUO, Po-Yi; CHAO, Tien-Sheng; HSIEH, Pei-Shan et al.I.E.E.E. transactions on electron devices. 2007, Vol 54, Num 5, pp 1171-1176, issn 0018-9383, 6 p.Article

The impact of deep Ni salicidation and NH₃ plasma treatment on nano-SOI FinFETsYOU, Hsin-Chiang; KUO, Po-Yi; KO, Fu-Hsiang et al.IEEE electron device letters. 2006, Vol 27, Num 10, pp 799-801, issn 0741-3106, 3 p.Article

A Novel p-n-Diode Structure of SONOS-Type TFT NVM With Embedded Silicon NanocrystalsCHIANG, Tsung-Yu; MA, William Cheng-Yu; WU, Yi-Hong et al.IEEE electron device letters. 2010, Vol 31, Num 11, pp 1239-1241, issn 0741-3106, 3 p.Article

Novel Symmetric Vertical-Channel Ni-Salicided Poly-Si Thin-Film Transistors With High ON/OFF-Current RatioWU, Yi-Hong; KUO, Po-Yi; LU, Yi-Hsien et al.IEEE electron device letters. 2010, Vol 31, Num 11, pp 1233-1235, issn 0741-3106, 3 p.Article

High-Performance Metal-Induced Laterally Crystallized Polycrystalline Silicon P-Channel Thin-Film Transistor With TaN/HfO₂ Gate Stack StructureMA, Ming-Wen; CHAO, Tien-Sheng; SU, Chun-Jung et al.IEEE electron device letters. 2008, Vol 29, Num 6, pp 592-594, issn 0741-3106, 3 p.Article

Novel Ion Bombardment Technique for Doping Limited Cu Source in SiO_x-Based Nonvolatile Switching LayerLIU, Sheng-Hsien; YANG, Wen-Luh; LIN, Yu-Hsien et al.IEEE electron device letters. 2013, Vol 34, Num 11, pp 1388-1390, issn 0741-3106, 3 p.Article

Amorphous-Layer Regrowth and Activation of P and As Implanted Si by Low-Temperature Microwave AnnealingHSUEH, Fu-Kuo; LEE, Yao-Jen; LIN, Kun-Lin et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 7, pp 2088-2093, issn 0018-9383, 6 p.Article

Impacts of N₂ and NH₃ Plasma Surface Treatments on High-Performance LTPS-TFT With High-κ Gate DielectricMA, Ming-Wen; CHAO, Tien-Sheng; CHIANG, Tsung-Yu et al.IEEE electron device letters. 2008, Vol 29, Num 11, pp 1236-1238, issn 0741-3106, 3 p.Article